CSSE 251: Introduction to Computer Organization (Winter 2010)
Eric Larson
Office: Engineering 528
Office Phone: 206-296-5513 (voice mail not checked regularly)
Office Hours: 8:45-10:00am MTThF or by appointment
Email: elarson@seattleu.edu (please
place ‘CSSE 251’ somewhere in the subject for quicker replies)
· Syllabus
· Unit 0 Computer Systems Organization (completed)
· Unit 1 Data Representation (completed)
· Unit 2 Digital Logic (completed)
· Unit 3 Assembly Language Programming (completed)
· Unit 4 Instruction Set Architecture (completed)
· Unit 5 Microarchitecture (completed)
· Unit 6 Memory (completed) (examples)
· Unit 7 Parallel Computer Architectures
· Homework 1 (solution)
· Homework 2 (solution)
· Homework 4 (solution)
· Homework 5 (Due: Mar. 12)
· Midterm Exam 1 (Jan. 26)
o Solution
o Review
o Sample Midterm Exam 1 (solution)
· Midterm Exam 2 (Feb. 25)
o Solution
o Review
o Sample Midterm Exam 2 (solution)
· Final Exam (Mar. 16 2:00-3:50pm)
o Review
o Sample Final Exam (solution)
|
Date |
Unit |
Topic |
Reading |
|
Jan. 5 (T) |
0 |
Computer Systems
Organization |
Ch. 1-2 |
|
Jan. 7 (Th) |
1 |
Integer representation, binary arithmetic |
App. A |
|
Jan. 8 (F) |
1 |
Floating point representation |
App. B |
|
Jan. 12 (T) |
1 / 2 |
Image & sound representation, logic gates, Boolean
functions |
Ch. 3.1 |
|
Jan. 14 (Th) |
2 |
Logic gates, Boolean functions, combinational digital
circuits |
Ch. 3.1 – 3.2 |
|
Jan. 15 (F) |
2 |
Combinational digital circuits |
Ch. 3.2 |
|
Jan. 19 (T) |
2 |
Sequential logic, finite state machines |
Ch. 3.2.4, 3.3.1-3.3.2 |
|
Jan. 21 (Th) |
2 |
Finite state machines, memory organization |
Ch. 3.3.4-3.3.6 |
|
Jan. 22 (F) |
2 |
Buses, Exam 1 Review |
Ch. 3.4, 3.6 |
|
Jan. 26 (T) |
|
Exam 1 |
|
|
Jan. 28 (Th) |
3 |
Assembly Language Programming |
none |
|
Jan. 29 (F) |
3 |
Assembly Language Programming |
none |
|
Feb. 2 (T) |
3 |
Assembly Language Programming |
none |
|
Feb. 4 (Th) |
3 |
Assembly Language Programming |
none |
|
Feb. 5 (F) |
3 / 4 |
Function calls, Instruction
set architectures |
Ch. 5.6.2, 5.1-5.3 |
|
Feb. 9 (T) |
4 |
Stack based architectures, addressing modes, I/O |
Ch. 5.3-5.5 |
|
Feb. 11 (Th) |
4 |
Interrupts and traps, compilation process |
Ch. 5.6.4-5.6.5, 7.4 |
|
Feb. 12 (F) |
|
No class – President's
Day holiday* |
|
|
Feb. 16 (T) |
5 |
Microarchitecture – control and datapath |
none |
|
Feb. 18 (Th) |
5 |
Performance, pipelining |
none |
|
Feb. 19 (F) |
5 |
Pipelining, data and
control hazards |
none |
|
Feb. 23 (T) |
|
Exam 2 Review |
|
|
Feb. 25 (Th) |
|
Exam 2 |
|
|
Feb. 26 (F) |
6 |
Caching |
Ch. 2.2.5, 2.3.1, 4.5.1 |
|
Mar. 2 (T) |
6 |
Caching |
Ch. 2.2.5, 2.3.1, 4.5.1 |
|
Mar. 4 (Th) |
6 |
Caching |
Ch. 2.2.5, 2.3.1, 4.5.1 |
|
Mar. 5 (F) |
6 |
Virtual Memory |
Ch. 6.1 |
|
Mar. 9 (T) |
6 / 7 |
Page Replacement, Parallel Computer Architectures |
Ch. 6.1, parts of Ch. 8
(see notes) |
|
Mar. 11 (Th) |
7 |
Parallel Computer Architectures |
Ch. 8.1-8.4 |
|
Mar. 12 (F) |
|
Final Exam Review |
|
|
Mar. 16 (T) |
|
Final Exam (2:00-3:50pm) |
|
*On February 12th, classes that meet on Friday are cancelled. However, classes that meet on Monday do meet on Friday, February 12th. There are no classes on Monday, February 15th.
· Basic of Computer Science animated (Modules on computer organizaton, integer representation, text representation, and media representation)
· Intel Software Developer's Manuals
· Wikipedia:
· PCI (Peripheral Component Interconnect)
· Intel Products (contains technical documents for many of their products)
· OpenMP (parallel programming – shared memory)
· MPI (parallel programming – message passing)
· Cilk++
· ebook on Multicore Software (from Clik++ developers)
Note: The instructor is not responsible for the content of any external website.